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Интерфейс ECBbus - разводка кабеля, техническая информация, описание
ECBbus
(at the network device).
(at the transciever).
96 PIN DIN 41612 FEMALE at the backplane
96 PIN DIN 41612 MALE at the boards.
The ECB-bus was defined in 1984 by the german company KONTRON.
It was defined for the 100x160mm-europa-card and used 2x32 pins of a
3x32-pin-connector (row a and c).
Later the third (middle) row of pins was defined for additional signals
used in 16-bit-systems. This extended bus uses all 3x32pins.
Row a & c (for 8 bit)
| Pin |
Name |
Desciption |
| a1 + |
5V + |
5 volts dc |
| a2 D |
5 D |
ata line bit 5 |
| a3 |
D6 |
Data line bit 6 |
| a4 |
D3 |
Data line bit 3 |
| a5 |
D4 |
Data line bit 4 |
| a6 |
A2 |
Address 2 |
| a7 |
A4 |
Address 4 |
| a8 |
A5 |
Address 5 |
| a9 |
A6 |
Address 6 |
| a10 |
WAIT/ |
CPU wait |
| a11 |
BUSRQ/ |
bus request |
| a12 |
|
|
| a13 |
|
|
| a14 |
|
|
| a15 |
|
|
| a16 |
|
|
| a17 |
|
|
| a18 |
A14 |
address 14 |
| a19 |
|
|
| a20 |
M1/ |
first cycle |
| a21 |
|
|
| a22 |
|
|
| a23 |
|
|
| a24 |
|
|
| a25 |
|
|
| a26 |
|
|
| a27 |
IORQ/ |
in/out request |
| a28 |
RFSH/ |
refresh cycle |
| a29 |
A13 |
address 13 |
| a30 |
A9 |
address 9 |
| a31 |
BUSAK/ |
bus acknowledge |
| a32 |
GND |
signal ground |
| Pin |
Name |
Desciption |
| c1 |
+5V |
+5 volts dc |
| c2 |
D0 |
Data line bit 0 |
| c3 |
D7 |
Data line bit 7 |
| c4 |
D2 |
Data line bit 2 |
| c5 |
A0 |
Address 0 |
| c6 |
A3 |
Address 3 |
| c7 |
A1 |
Address 1 |
| c8 |
A8 |
Address 8 |
| c9 |
A7 |
Address 7 |
| c10 |
|
|
| c11 |
IEI |
interrupt enable in |
| c12 |
|
|
| c13 |
|
|
| c14 |
D1 |
Data line bit 1 |
| c15 |
|
|
| c16 |
IEO |
interrupt enable out |
| c17 |
A11 |
address 11 |
| c18 |
A10 |
address 10 |
| c19 |
|
|
| c20 |
NMI/ |
not maskable interrupt |
| c21 |
INT/ |
normal interrupt |
| c22 |
WR/ |
write cycle |
| c23 |
|
|
| c24 |
RD/ |
read cycle |
| c25 |
HALT/ |
cpu stopped |
| c26 |
|
|
| c27 |
A12 |
address 12 |
| c28 |
A15 |
address 15 |
| c29 |
|
|
| c30 |
MREQ/ |
memory request |
| c31 |
RESET/ |
cpu reset |
| c32 |
GND |
signal ground |
Row b (additional for 16 bit)
| Pin |
Name |
Desciption |
| b1 |
+5V |
+5 volts dc |
| b2 |
A20 |
address 20 |
| b3 |
A21 |
address 21 |
| b4 |
A22 |
address 22 |
| b5 |
A23 |
address 23 |
| b6 |
D8 |
data line bit 8 |
| b7 |
D9 |
data line bit 9 |
| b8 |
D10 |
data line bit 10 |
| b9 |
D11 |
data line bit 11 |
| b10 |
D12 |
data line bit 12 |
| b11 |
D13 |
data line bit 13 |
| b12 |
D14 |
data line bit 14 |
| b13 |
D15 |
data line bit 15 |
| b14 |
IRQ7 |
interrupt 7 |
| b15 |
IRQ6 |
interrupt 6 |
| b16 |
IRQ5 |
interrupt 5 |
| b17 |
IRQ4 |
interrupt 4 |
| b18 |
IRQ3 |
interrupt 3 |
| b19 |
IRQ2 |
interrupt 2 |
| b20 |
IRQ1 |
interrupt 1 |
| b21 |
IRQ0 |
interrupt 0 |
| b22 |
IOWR |
I/O write |
| b23 |
?? |
?? |
| b24 |
IORC |
I/O read |
| b25 |
MRDC |
Mem read |
| b26 |
?? |
?? |
| b27 |
MWRC |
Mem write |
| b28 |
DS0 |
Data Select 0 |
| b29 |
DS1 |
Data Select 1 |
| b30 |
OFF |
bus driver tristate |
| b31 |
LOCK |
bus driver tristate disabled |
| b32 |
GND |
signal ground |
| DS0 |
DS1 |
Description |
| 0 |
0 |
data transfer 16-bit |
| 0 |
1 |
only bit 0-7 |
| 1 |
0 |
only bit 8-15 |
| 1 |
1 |
no data transfer |
Note: / = Active Low
| Source: |
One issue of the magazine computer-technik (c't) in 1984
|
Информация предоставлена справочником The Hardware Book Team 1996-2004.